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單片機文獻翻譯

發布時間:2023-03-21 07:53:03

A. 求基於單片機的全自動洗衣機外文翻譯

Abstract :This engineering design is to regard AT89C2051 as the key component , because there are few pins of AT89C2051, the memory is not big in capacity, so, the function of the washing machines controlled has certain restriction , but, because the basic function of the washing machine is to the washing of the clothes, so, the key lies in carrying on the control of the laundry procere. Proceed from this angle, analyse , the main function of the automatic washing machine designed has the following seven items to the function of the washing machine : Have strong , weak washing functions; Four laundry working routine, already standardization program , economic procere, procere drain off water procere enter , drainage system trouble diagnose the function automatically alone; Safe protection while dehydrating and defending the vibration function; Drive way of the
intermittence ; Suspend the function; The sound only shows the function.
Key word: AT89C2051, full-automatic washing machine, engineering design , control circuit

B. 求單片機參考文獻,中文的有相應的外文翻譯

[1]楊十元.模擬系統故障診斷與可靠性設計,清華人學出版社,2004
[2]童詩白.模擬電子技術基礎,高教出版社,2006
[3]周航慈.單片機應用程序設計技術,北京航空航大大學出版社,2005
[4]李剛.ADuC812系列單片機原理和應用技術,北京航空航天山版社,2005
[5]胡誕康.在線測試技術的發展與展望,計量與測試技術,2001
[6]星河科技開發公司,印刷電路板在線測試系統的發展與應用,電子標准化與測量,2003
[7]季華.PCB測試技術的綜合利用,電子產品世界,2007-12
[8]鮮壇.組裝測試技術應用前景分析,世界電子元器件,2008-1
[9]張金敏.基於單片機控制的智能電阻電容在線測試儀,甘肅科技,2006
[10]庄紹雄王濟浩張迎春.智能阻容在線測試技術,山東工業大學學報,
[11]陳國順陳春沙王格芳等.通用電路板在線測試儀設計與開發,儀器儀表學報,2001
[12]Nancy Hplland.Automated Instruments Smooth Rapid Test System Development.Test & Measurement World,AUGUST 2001
[13]盧育強.如何設定ICT的上下限,電子生產設備,2003 142-143
[14]趙悅 沈青松 終玉軍.路板的測試技術,遼寧工學院學報,2008-1
[15]程亞黎 曾周末.電路故障自動測試與診斷系統,中國儀器儀表,2007

C. 單片機畢業論文外文文獻怎麼找去哪個網站

網路學術,將你所需要的關鍵詞翻譯成英文,再搜索就可以,還可以直接查看哪裡可以下載全文。

D. 單片機外文翻譯

我的網路文庫里有很多單片機方面的英文文獻帶翻譯的的 大多符合你的要求,你可以去挑選下!

E. 文獻求助,畢設是基於單片機的智能小車設計,現在需要一片相關外文文獻做外文翻譯1.0~1.5萬外文印刷字元

基於單片機的智能小車設計
OK 我可以指導。

F. 單片機的英文全稱

「單片機」是我們國人的稱呼,即single chip microcomputer (SCM),但國際上的說法應該是Micro Control Unit(MCU),即微控制單元。

單片機是一種集成電路晶元。

單片機是採用超大規模集成電路技術把具有數據處理能力的中央處理器CPU、隨機存儲器RAM、只讀存儲器ROM、多種I/O口和中斷系統、定時器/計數器等功能。

(可能還包括顯示驅動電路、脈寬調制電路、模擬多路轉換器、A/D轉換器等電路)集成到一塊矽片上構成的一個小而完善的微型計算機系統,在工業控制領域廣泛應用。從上世紀80年代,由當時的4位、8位單片機,發展到現在的300M的高速單片機。

硬體特徵

1、單片機的體積比較小, 內部晶元作為計算機系統,其結構簡單,但是功能完善,使用起來十分方便,可以模塊化應用。

2、單片機有著較高的集成度,可靠性比較強,即使單片機處於長時間的工作也不會存在故障問題。

3、單片機在應用時低電壓、低能耗,是人們在日常生活中的首要選擇, 為生產與研發提供便利。

4、單片機對數據的處理能力和運算能力較強,可以在各種環境中應用,且有著較強的控制能力。

G. 單片機英文文獻及翻譯,2200字左右

Single-Chip Microcomputer
有的時候,也可以用SingleChip來代替
下面鏈接的第六章有講單片機Single Chip Microcmputer 第148頁開始
http://books.google.co.nz/books?id=AUtTx3TgO7IC&pg=PT41&lpg=PT41&dq=what+is+Single+Chip+Microcomputer&source=web&ots=QQqVentmyy&sig=ZPBVtVXwiQakAtCIXJqzRw_BobE&hl=en&sa=X&oi=book_result&resnum=8&ct=result#PPT41,M1

這是一段中漢對照的。
中文:
單片機是把主要計算機功能部件都集成在一塊晶元上的微型計算機。它是一種集計數和多中介面於一體的微控制器,被廣泛應用在智能產品和工業自動化上,而51單片機是個單片機中最為典型和最有代表性的一種。
本課題選擇89S51為核心控制元件,設計了一個日常生活中用到的電子音樂門鈴系統。當功能按鍵按下,音樂響起,發光二極體隨著音樂的節拍進行閃爍,LED顯示相應的定時器初值。音樂演奏過程中再次按下按鍵無效,只有當音樂段結束再次按下才有效。如果是電子音樂門鈴在響,按下復位按鍵就終止,顯示初始狀態。經過實踐證明,本系統運行穩定,具有一定的實用價值。
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翻譯:
SCM is a major piece of computer components are integrated into the chip micro-computer. It is a multi-interface and counting on the micro-controller integration, and intelligence procts are widely used in instrial automation. and MCS-51 microcontroller is a typical and representative.

The topics chosen for the 89S51 control of the core components used in the design of a daily electronic music doorbell system. When the function button is pressed, the music sounded and the music beats with light emitting diodes for flickered. Initial corresponding LED timer. Musical process again pressed the button ineffective, and only when pressed again before the end of the music effectively. If the doorbell ring for electronic music, press the button on the rection and termination, showed initial state. Practice has proved that the system is stable and has some practical value.

本設計是以凌陽16位單片機為重心,介紹語音控制在機械手中的應用,實現微型舵機的運作,完成所指定的動作。其中通過凌陽16位單片機輸出的脈沖信號來准確的控制機械手的擺動角度,機械手的捏拿動作由電磁鐵完成,電磁鐵的通斷由凌陽16位單片機的I/O口控制,硬體和軟體都在具體的實驗中證明了其可行性
This design is take insults the positive 16 monolithic integrated circuits as a center of gravity, introced the pronunciation control in manipulator's application, the realization miniature servo operation, completes the movement which assigns. Through insults the pulse signal which the positive 16 monolithic integrated circuits outputs to come the accurate control manipulator to swing the angle, the manipulator pinches takes the movement to complete by the electro-magnet, the electro-magnet passes the legal reason for judgment to insult the positive 16 monolithic integrated circuits I/O control, the hardware and the software all have proven its feasibility in the concrete experiment

H. 需要一篇自動控制方面的英文文獻

本畢業設計課題是屬於教師擬定性課題,主要是研究基於單片機的對步進電機的有效控制。步進電機是一種能將數字輸入脈沖轉換成旋轉舉察或直線增量運動的電磁執行元件,每輸入蠢虛一個脈沖電機轉軸步進一個步距角增量。電機總的回轉角與輸入脈沖數成正比例,相應的轉速取決於輸入脈沖頻率。

步進電機是機正檔茄電一體化產品中關鍵部件之一,通常被用作定位控制和定速控制。步進電機慣量低、定位精度高、無累積誤差、控制簡單等特點。廣泛應用於機電一體化產品中,如:數控機床、包裝機械、計算機外圍設備、復印機、傳真機等。

Abstract
This article mainly elaborated has been hanging the movement control system merit, introced was hanging the movement control system function, the principle and the design process. Is hanging the movement control system is one of in control engineering domain important applications, its main target is to is controlled the object the movement condition, including path, speed and position implementation check. The movement control system compares with other control systems, has the system model simply, the check algorithm is unitary, also not complex characteristic and so on non-linearity and coupling situation. Also is precisely because the movement control system can implement to the path, the running rate, the pointing accuracy as well as the repetition precision accuracy control requirement, has the broad application foreground in each category of control engineering, therefore the movement control system has at present become in the check study application domain very much significant the research direction. Through the monolithic integrated circuit to stepping monitor check, implemented the motor-driven to cause the object at on the board which inclined the movement, The control section is the SST89E52 monolithic microcomputer which SST Corporation proces primarily, with when the 1602LCD liquid crystal screen and according to turned has implemented with the user interactive, through the keyboard entry different control command, the liquid-crystal display was allowed to display the setting value and the run the coordinates. The electrical machinery control section used LM324N four to transport puts and is connected the electronic primary device voluntarily to develop the 42BYG205 stepping monitor actuation electric circuit to implement the electrical machinery accuracy control. The algorithm partially for will suit the monolithic integrated circuit system to operate carries on optimizes many times, will rece the microprocessor the operand. Has completed the object voluntarily the movement and according to the different setup path movement.
Key words Magneto; 1602LCD; LM324N; Drive circuit

選擇步進電機時,首先要保證步進電機的輸出功率大於負載所需的功率。而在選用功率步進電機時,首先要計算機械繫統的負載轉矩,電機的矩頻特性能滿足機械負載並有一定的餘量保證其運行可靠。在實際工作過程中,各種頻率下的負載力矩必須在矩頻特性曲線的范圍內。一般地說最大靜力矩Mjmax大的電機,負載力矩大[1 ]。

選擇步進電機時,應使步距角和機械繫統匹配,這樣可以得到機床所需的脈沖當量。在機械傳動過程中為了使得有更小的脈沖當量,一是可以改變絲桿的導程,二是可以通過步進電機的細分驅動來完成。但細分只能改變其解析度,不改變其精度。精度是由電機的固有特性所決定。

選擇功率步進電機時,應當估算機械負載的負載慣量和機床要求的啟動頻率,使之與步進電機的慣性頻率特性相匹配還有一定的餘量,使之最高速連續工作頻率能滿足機床快速移動的需要。
基於單片機的懸掛運動控制系統,具有硬體電路結構簡單,精確度高,抗干擾性強等優點。

1.2 課題目的
培養綜合運用四年大學所學知識去分析問題和解決實際問題的能力。在實踐中檢驗所學知識,從而加強理論與實踐的相結合。 體驗一個科研項目開發的全過程,學會單片機開發應用方法,鍛煉應用能力,動手能力。本課題設計是具有一定難度的基於單片機的應用系統開發項目,培養學生創新精神和創新能力。通過這次畢業論文及設計,檢驗的綜合素質和專業教育的培養效果,並且使學會閱讀、利用英文文獻資料,閱讀並翻譯外文資料的能力,學會設計報告和論文。

1.3 課題意義
隨著社會的發展、科技的進步以及人們生活水平的逐步提高,各種方便於生活的自動控制系統開始進入了人們的生活,以單片機為核心的自動門系統就是其中之一。同時也標志了自動控制領域成為了數字化時代的一員[ 3]。它實用性強,功能齊全,技術先進,使人們相信這是科技進步的成果。它更讓人類懂得,數字時代的發展將改變人類的生活,將加快科學技術的發展。
通過對「微機控制自動門系統」的研究和設計,精心撰寫了微機控制自動門系統論文。本論文著重闡述了以單片機為主體,LED點陣顯示晶元及步進電機為核心的系統。
本設計主要應用SST89E58作為控制核心,LED點陣顯示晶元、步進電機、壓力感測器、電位器相結合的系統。充分發揮了單片機的性能。其優點硬體電路簡單,軟體功能完善,控制系統可靠,性價比較高等特點,具有一定的使用和參考價值。

1.4 應解決的主要問題
在基於單片機的懸掛運動控制系統中,主要分三個部分設計,一個是輸入和鍵盤顯示模塊;另一個是步進電機驅動模塊;第三個是最小系統和輸出模塊設計。主要解決的問題是:
1. 單片機最小系統硬體設計;
2. 步進電機驅動模塊設計;
3. 輸出部分的軟硬體設計;
4. 主程序設計;
5. 繪圖板的設計。

1.5 技術要求
設計一電機控制系統,控制物體在傾斜(仰角≤100度)的板上運動。
在一白色底板上固定兩個滑輪,兩只電機(固定在板上)通過穿過滑輪的吊繩控制一物體在板上運動,運動范圍為80cm×100cm。物體的形狀不限,質量大於100克。物體上固定有淺色畫筆,以便運動時能在板上畫出運動軌跡。板上標有間距為1cm的淺色坐標線(不同於畫筆顏色),左下角為直角坐標原點。

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I. 單片機英文文獻及翻譯,5000字左右 急需 謝謝 [email protected]

Introction of Programmable controllers
From a simple heritage, these remarkable systems have evolved to not only replace electromechanical devices, but to solve an ever-increasing array of control problems in both process and nonprocess instries. By all indications, these microprocessor powered giants will continue to break new ground in the automated factory into the 1990s.
HISTORY
In the 1960s, electromechanical devices were the order of the day ass far as control was concerned. These devices, commonly known as relays, were being used by the thousands to control many sequential-type manufacturing processes and stand-along machines. Many of these relays were in use in the transportation instry, more specifically, the automotive instry. These relays used hundreds of wires and their interconnections to effect a control solution. The performance of a relay was basically reliable - at least as a single device. But the common applications for relay panels called for 300 to 500 or more relays, and the reliability and maintenance issues associated with supporting these panels became a very great challenge. Cost became another issue, for in spite of the low cost of the relay itself, the installed cost of the panel could be quite high. The total cost including purchased parts, wiring, and installation labor, could range from $30~$50 per relay. To make matters worse, the constantly changing needs of a process called for recurring modifications of a control panel. With relays, this was a costly prospect, as it was accomplished by a major rewiring effort on the panel. In addition these changes were sometimes poorly documented, causing a second-shift maintenance nightmare months later. In light of this, it was not uncommon to discard an entire control panel in favor of a new one with the appropriate components wired in a manner suited for the new process. Add to this the unpredictable, and potentially high, cost of maintaining these systems as on high-volume motor vehicle proction lines, and it became clear that something was needed to improve the control process – to make it more reliable, easier to troubleshoot, and more adaptable to changing control needs.
That something, in the late 1960s, was the first programmable controller. This first 『revolutionary』 system wan developed as a specific response to the needs of the major automotive manufacturers in the United States. These early controllers, or programmable logic controllers (PLC), represented the first systems that 1 could be used on the factory floor, 2 could have there 『logic』 changed without extensive rewiring or component changes, and 3 were easy to diagnose and repair when problems occurred.
It is interesting to observe the progress that has been made in the past 15 years in the programmable controller area. The pioneer procts of the late 1960s must have been confusing and frightening to a great number of people. For example, what happened to the hardwired and electromechanical devices that maintenance personnel were used to repairing with hand tools? They were replaced with 『computers』 disguised as electronics designed to replace relays. Even the programming tools were designed to appear as relay equivalent presentations. We have the opportunity now to examine the promise, in retrospect, that the programmable controller brought to manufacturing.
All programmable controllers consist of the basic functional blocks shown in Fig. 10. 1. We』ll examine each block to understand the relationship to the control system. First we look at the center, as it is the heart ( or at least the brain ) of the system. It consists of a microprocessor, logic memory for the storage of the actual control logic, storage or variable memory for use with data that will ordinarily change as a function power for the processor and memory. Next comes the I/O block. This function takes the control level signals for the CPU and converts them to voltage and current levels suitable for connection with factory grade sensors and actuators. The I/O type can range from digital (discrete or on / off), analog (continuously variable), or a variety of special purpose 『smart』 I/O which are dedicated to a certain application task. The programmer is shown here, but it is normally used only to initially configure and program a system and is not required for the system to operate. It is also used in troubleshooting a system, and can prove to be a valuable tool in pinpointing the exact cause of a problem. The field devices shown here represent the various sensors and actuators connected to the I/O. These are the arms, legs, eyes, and ears of the system, including push buttons, limit switches, proximity switches, photosensors, thermocouples, RTDS, position sensing devices, and bar code reader as input; and pilot lights, display devices, motor starters, DC and AC drives, solenoids, and printers as outputs.
No single attempt could cover its rapidly changing scope, but three basic characteristics can be examined to give classify an instrial control device as a programmable controller.
(1) Its basic internal operation is to solve logic from the beginning of memory to some specified point, such as end of memory or end of program. Once the end is reached, the operation begins again at the beginning of memory. This scanning process continues from the time power is supplied to the time it it removed.
(2) The programming logic is a form of a relay ladder diagram. Normally open, normally closed contacts, and relay coils are used within a format utilizing a left and a right vertical rail. Power flow (symbolic positive electron flow) is used to determine which coil or outputs are energized or deenergized.
(3) The machine is designed for the instrial environment from its basic concept; this protection is not added at a later date. The instrial environment includes unreliable AC power, high temperatures (0 to 60 degree Celsius), extremes of humidity, vibrations, RF noise, and other similar parameters.
General application areas
The programmable controller is used in a wide variety of control applications today, many of which were not economically possible just a few years ago. This is true for two general reasons: 1 there cost effectiveness (that is, the cost per I/O point) has improved dramatically with the falling prices of microprocessors and related components, and 2 the ability of the controller to solve complex computation and communication tasks has made it possible to use it where a dedicated computer was previously used.
Applications for programmable controllers can be categorized in a number of different ways, including general and instrial application categories. But it is important to understand the framework in which controllers are presently understood and used so that the full scope of present and future evolution can be examined. It is through the power of applications that controllers can be seen in their full light. Instrial applications include many in both discrete manufacturing and process instries. Automotive instry applications, the genesis of the programmable controller, continue to provide the largest base of opportunity. Other instries, such as food processing and utilities, provide current development opportunities.
There are five general application areas in which programmable controllers are used. A typical installation will use one or more of these integrated to the control system problem. The five general areas are explained briefly below.

Description
The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel』s high-density nonvolatile memory technology and is compatible with the instry-standard MCS-51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.
Function characteristic
The AT89C51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full plex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system to continue functioning. The Power-down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.
Pin Description
VCC:Supply voltage.
GND:Ground.
Port 0:
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as highimpedance inputs.Port 0 may also be configured to be the multiplexed loworder address/data bus ring accesses to external program and data memory. In this mode P0 has internal pullups.Port 0 also receives the code bytes ring Flash programming,and outputs the code bytes ring programverification. External pullups are required ring programverification.

Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1 output buffers can sink/source four TTL inputs.When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.Port 1 also receives the low-order address bytes ring Flash programming and verification.
Port 2
Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2 output buffers can sink/source four TTL inputs.When 1s are written to Port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 2 pins that are externally being pulled low will source current, because of the internal pullups.Port 2 emits the high-order address byte ring fetches from external program memory and ring accesses to external data memory that use 16-bit addresses. In this application, it uses strong internal pullupswhen emitting 1s. During accesses to external data memory that use 8-bit addresses, Port 2 emits the contents of the P2 Special Function Register.Port 2 also receives the high-order address bits and some control signals ring Flash programming and verification.
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal pullups.The Port 3 output buffers can sink/source four TTL inputs.When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs,Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.Port 3 also serves the functions of various special features of the AT89C51 as listed below:

Port 3 also receives some control signals for Flash programming and verification.

RST
Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byte of the address ring accesses to external memory. This pin is also the program pulse input (PROG) ring Flash programming.In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped ring each access to external Data Memory.
If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only ring a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

PSEN
Program Store Enable is the read strobe to external program memory.When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped ring each access to external data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.EA should be strapped to VCC for internal program executions.This pin also receives the 12-volt programming enable voltage(VPP) ring Flash programming, for parts that require12-volt VPP.

XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.

Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively,of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figure 1.Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 2.There are no requirements on the ty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.

Figure 1. Oscillator Connections Figure 2. External Clock Drive Configuration

Idle Mode
In idle mode, the CPU puts itself to sleep while all the onchip peripherals remain active. The mode is invoked by software. The content of the on-chip RAM and all the special functions registers remain unchanged ring this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset.It should be noted that when idle is terminated by a hard ware reset, the device normally resumes program execution,from where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when Idle is terminated by reset, the instruction following the one that invokes Idle should not be one that writes to a port pin or to external memory.

Power-down Mode
In the power-down mode, the oscillator is stopped, and the instruction that invokes power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power-down mode is terminated. The only exit from power-down is a hardware reset. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.

Program Memory Lock Bits
On the chip are three lock bits which can be left unprogrammed (U) or can be programmed (P) to obtain the additional features listed in the table below.

When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched ring reset. If the device is powered up without a reset, the latch initializes to a random value, and holds that value until reset is activated. It is necessary that the latched value of EA be in agreement with the current logic level at that pin in order for the device to function properly

J. 求51系列單片機系統實驗板的外文翻譯,大概要3000字左右

8-Bit Microcontroller-AT89C51

Features
Compatible with MCS-51 Procts
4 Kbytes of In-System Reprogrammable Flash Memory
Enrance: 1,000 Write/Erase Cycles
Fully Static Operation: 0 Hz to 24 MHz
Three-Level Program Memory Lock
128 x 8-Bit Internal RAM
32 Programmable I/O Lines
Two 16-Bit Timer/Counters
Six Interrupt Sources
Programmable Serial Channel
Low Power Idle and Power Down Mode
Description
The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4Kbytes of Flash Programmable and Erasable Read Only Memory (PEROM). The device is manufactured using Atmel』s high density nonvolatile memory technology and is compatible with the instry standard MCS-51instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly flexible and cost effective solution to many embedded control applications.
The AT89C51 provides the following standard features: 4Kbytes of Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five vector two-level interrupt architecture, a full plex serial port, on-chip oscillator and clock circuitry. In addition, the AT89C51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The idle Mode stops the CPU while allowing the RAM, timer/count- ers, serial port and interrupt system to continue functioning. The Power Down Mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.
Pin Configurations

Pin Description
VCC:Supply voltage.
GND:Ground.
Port 0
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs.
Port 0 may also be configured to be the multiplexed low- order address/data bus ring accesses to external program and data memory. In this mode P0 has internal pullups.
Port 0 also receives the code bytes ring Flash programming, and outputs the code bytes ring program verification. External pullups are required ring program verification.
Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pullups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pullups and can be used as inputs. As inputs.
Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pullups.
Port 1 also receives the low-order address bytes ring Flash programming and program verification.
Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pullups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to port 2 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, port 2 pins that are externally being pulled low will source current because of the internal pullups.
Port 2 emits the high-order address byte ring fetches from external program memory and ring accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, it uses strong internal data memory that use 8-bit addresses (MOVX @ RI). Port 2 emits the cintents of the P2 special Function Register.
Port 2 also receives the high-order address bits and some control signals ring Flash programming and verification.
Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pullups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pullups.
Port 3 also serves the functions of various special features of the AT89C51 as listed below:

Port 3 also receives some control signals for Flash programming and programming verification.
RST
Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byte of the address ring accesses to external memory. This pin is also the program pulse input (PROG) ring Flash programming.
In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes.. Note ,however, that one ALE pulse is skipped ring each access to external Data Memory.If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.
PSEN
Program Store Enable is the read strobe to external pro- gram memory. When the AT89C51is executing code from external pro- gram memory, PSEN is ac tivated twice each machine cycle, except that two PSEN activations are skipped ring each access to external data memory.
EA/VPP
External Access Enable. must be strapped to GND in order to enable the device to fetch code from external pro- gram memory locations starting at 0000H up to FFFFFH. Note, however, that if lock bit 1 is programmed, will be internally latched on reset. EA should be strapped to VCC for internal program execu tions. This pin also receives the 12-volt programming enable voltage (VPP) ring Flash programming, for parts that re- quire 12-volt VPP.
XTAL1: Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2: Output from the inverting oscillator amplifier.
Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven. There are no requirements on the ty cycle of the external clock signal, since the input to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed.
Power Down Mode
In the power down mode the oscillator is stopped, and the instruction that invokes power down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the power down mode is terminated. The only exit from power down is a hardware reset. The only exit from power down is a hardware reset. Reset redefines the SFRs but does not change the on- chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.
Data Memory
The AT89C52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. That means the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space.
When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or the SFR space. Instructions that use direct addressing access SFR space.
For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2).
MOV 0A0H, #data Instructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).
MOV @R0, #data
Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space.
Timer 0 and 1
Timer 0 and Timer 1 in the AT89C52 operate the same way as Timer 0 and Timer 1 in the AT89C51.
Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON, as shown in Table 3.
Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator frequency.
In the Counter function, the register is incremented in response to a l-to-0 transition at its corresponding external input pin, T2. In this function, the external input is sampled ring S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register ring S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle.
Special Function Registers
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in Table 1.
Note that not all of the addresses are occupied, and unoccupied addresses may not be implemented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect.
User software should not write 1s to these unlisted locations, since they may be used in future procts to invoke new features. In that case, the reset or inactive values of the new bits will always be 0.
Timer 2 Registers Control and status bits are contained in registers
T2CON (shown in Table 2) and T2MOD (shown in Table 4) for Timer 2. The register pair (RCAP2H, RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode. Interrupt Registers The indivial interrupt enable bits are in the IE register. Two priorities can be set for each of the six interrupt sources in the IP register.

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